Causes:
This is a causality relation for which the nth tick of the left clock appears either before or at the same time than the nth tick of the right clock (the causality is not temporal but the effect cannot appear before the causes).
Example of a CCSL specification:
/*
* c1 causes c2 (c2 depends on c1)
* @author: Julien DeAntoni
* date : Wed jul 8th 2011
*/
ClockConstraintSystem MySpec {
imports {
import "ccsl:kernel" as kernelLib ; //add the kernel constraints to your specification
}
entryBlock main
Block main {
Clock c1
Clock c2
Relation r1[Causes](LeftClock -> c1, RightClock -> c2 )
//alternatives: Relation r1[DependsOn](LeftClock -> c2, RightClock -> c1)
}
}
Simulation results:
The Causes relation is simulated on the next picture. Some ticks of c2 occur after their corresponding tick in c1 and some others at the same time...
On the bottom right, the clock domain is represented; here, the two clocks are linked by an untimed relation (<= means either < or ==).
