UpTo:
This is both a synchronous and an asynchronous temporal expression. It creates an implicit clock that is the result of the expression. The implicit clock ticks in coincidence with 'ClockToFollow' (ie c1 in the example) until 'KillerClock' (ie c2) ticks. Once c2 ticked, the implicit clock is dead. Note that the death is propagated by the coincidence relation so that, in the example, c3 dies at the same time than the implicit clock.
the CCSL specification:
/*
* c3 = c1 upTo c2
* @author: Julien DeAntoni
* date : Tue jul 19th 2011
*/
ClockConstraintSystem MySpec {
imports {
import "ccsl:kernel" as kernelLib ; //add the kernel constraints to your specification
}
entryBlock main
Block main {
Clock c1
Clock c2
Clock c3
Expression c1UpToc2 = UpTo ClockToFollow -> c1, KillerClock -> c2 )
Relation r1[Coincides](Clock1 -> c3, Clock2 -> c1UpToc2 )
}
}
Simulation results:
An UpTo expression simulation is represented on the next picture. The two first ticks of the implicit clock tick in coincidence with c1 until the first tick of c2. Once again, the resulting partial order is provided by TimeSquare and shown on the timing diagram.
On the bottom right, the clock domain is represented; here, the implicit clock is subClock of c1 and c2 kills the implicit clock.
