Sup:
This is both a synchronous and an asynchronous temporal expression. It creates an implicit clock that is the result of the expression. The implicit clock ticks in coincidence one of the clock provided as a parameter. More precisely, it ticks with the one that does not precede the other. In the following, to ease the reading we add a coincidence relation between the implicit result clock and an explicit clock named c3.
the CCSL specification:
/*
* c3 = Sup(c1, c2)
* @author: Julien DeAntoni
* date : Wed jul 11th 2011
*/
ClockConstraintSystem MySpec {
imports {
import "ccsl:kernel" as kernelLib ; //add the kernel constraints to your specification
}
entryBlock main
Block main {
Clock c1
Clock c2
Clock c3
Expression c1Supc2 = Sup Clock1 -> c1, Clock2 -> c2 )
Relation r1[Coincides](Clock1 -> c3, Clock2 -> c1Supc2 )
}
}
Simulation results:
A Sup expression simulation is represented on the next picture. The six first ticks of the implicit clock tick with c2 while the others ticks coincide with c2. Moreover, the precedence relation is explicitly provided by timesquare and shown on the picture.
On the bottom right, the clock domain is represented; here, a symbolique clock that represents the union of c1 and c2 is represented (so c1 and c2 are both subclock of the union clock). The only thing know is that the implicit clock is then a subclock of the union clock.
Note that this expression provides a solution that is partially ordered as show in the previous picture where the instant relations are displayed.
