I'm a third year PhD Student supervised by Robert de Simone (INRIA) and François Verdier (LEAT). I'm also a teaching assistant in Polytech'Nice. I'm currently working in the INRIA team AOSTE which is common with the Univ. of Nice Sophia-Antipolis and CNRS (I3S laboratory). My main research areas are high level power and time modeling for optimisation and verification of real-time embedded systems. There are many different and more or less sophisticated models of software and hardware. Given the complexity of our machines, it is often non trivial to decide which task runs where, which message goes through which link and so on. Thereafter I show the optimal execution of a set of tasks on a set of 3 heterogeneous resources. In this model I consider a set of 10 tasks with precedences, and I consider the cost of message passing between resources. The tasks and messages are non preemtibles. The directed acyclic graph shows the application in which vertices are tasks and edges are messages. The cost of a task for each heterogeneous resource is listed in the vertex. The gantt diagram shows (one of) the executions which has the lowest completion time.

The optimal execution of a direct acyclic graph of non-preemptive tasks on an heterogeneous dual core platform interconnected through a Bus




I'm a teaching assistant in microprocessor programming in Polytech'Nice: previously ARM7 LPC µC and IAR toolchain, and currently STM32F4 Cortex-M4 µC and Keil toolchain. It covers the following topics:


Feel free to ask if you wish to share some insight with me or ask me something about my work or what I teach.

You can find me here:

INRIA Sophia Antipolis Méditerranée
Lagrange building, office L039
2004 route des Lucioles
06902 Sophia Antipolis



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