Architectures validation in an object-oriented framework
Keywords:
Hardware architectures, object-oriented modelling, validation, performance evaluation, simulation
Abstract:
This work presents a new method to validate hardware
architecture models in an object-based modelling and simulation framework.
Our incremental method called Sep consists in simulating high level models
to evaluate performances of new hardware architectures relatively to critical
digital signal processing applications. Efficient architecture models built
early in the design process due to this high-level assessment are refined
until they can be used as references helping the design of RTL models. We
introduce two of the object-based mechanisms allowing reusable modelling
: dynamic binding and module service. We advocate these both mechanisms were
efficiently used to take complex types - such as binary decision diagrams
(BDD) representing algebraic expressions - into account; and those types
are used to validate architecture models, verifying the functional accuracy
of high-level services relatively to the specification.
© 2001 Simulation Councils, inc.
@inproceedings{MD:ESM2001,
author = {Fr{\'e}d{\'e}ric Mallet and
Fernand Bo{\'e}ri},
title = {Architectures validation in an Object-oriented framework},
booktitle = {ESM},
year = {2001},
pages = {139--145},
crossref = {conf/esm/2001}
}
@proceedings{conf/esm/2001,
editor = {Rik Van Landeghem},
title = {15$^{\mbox{th}}$ European Simulation Multiconference - Simulation
and Modelling: Enablers for a Better Quality of Life, June
6-9, 2001, Prague, Czech Republic},
booktitle = {ESM},
publisher = {SCS Europe},
year = {2001},
isbn = {1-56555-204-0}
}