Abstract: Know-how is the most useful mean for designing new processors before a complete hardware description. The integration rate is increasing very quickly and the time-to-market has to be dramatically reduced because of the rapid evolution of technology. Therefore, reuse and rapid-prototyping are definitely a major issue to integrate existing architectures and to design new ones.
SEP is an object-oriented framework which attends these problems. This paper intends to show major problems and solutions in simulation due to our simplification choices and in particular due to a not typed specification. It also presents the service feature which is a major enhancement to SEP and allow some validation of static properties about the rapid-prototyped model and its associated instruction-set. In this paper some examples related to the modelling of an industrial bi-core architecture from VLSI Technology - a subsidiary of Philips Semiconductors - are used to illustrate our method.

@inproceedings{MBD:ESM2000,
  author    = {Fr{\'e}d{\'e}ric Mallet and
               Fernand Bo{\'e}ri and
               Jean-Fran\c{c}ois Duboc},
  title     = {{SEP}: Simulation framework to evaluate digital hardware architectures},
  booktitle = {ESM},
  year      = {2000},
  pages     = {355--359},
  crossref  = {DBLP:conf/esm/2000},
  bibsource = {DBLP, http://dblp.uni-trier.de}
}

@proceedings{DBLP:conf/esm/2000,
  editor    = {Rik Van Landeghem},
  title     = {14$^{\mbox{th}}$ European Simulation Multiconference - Simulation
               and Modelling: Enablers for a Better Quality of Life, May
               23-26, 2000, Ghent, Belgium},
  booktitle = {ESM},
  publisher = {SCS Europe},
  year      = {2000},
  isbn      = {1-56555-204-0},
  bibsource = {DBLP, http://dblp.uni-trier.de}
}