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00034 #include "DDG.h"
00035 #include <iostream>
00036 #include <cstdlib>
00037
00038
00039 using namespace std;
00040 using namespace DDG;
00041
00042
00043
00044 int main(int argc, char *argv[])
00045 {
00046
00047
00048
00049 char str[MAX_STRING];
00050
00051
00052 DDG::DAG dag;
00053 DDG::ARCHITECTURE isa_arch;
00054 char *ddg_filename=NULL, *arch_filename=NULL, *regtypename=NULL;
00055 LEDA::node n,u;
00056 LEDA::edge e;
00057 int c,i,t;
00058 LEDA::list<node> nl;
00059 INSTRUCTIONS_TYPES it;
00060 LEDA::set<node> MA;
00061 LEDA::set<node> VR;
00062 LEDA::node_array<node> killer;
00063 REGISTER_TYPES rt;
00064 LEDA::list<REGISTER_TYPES> T;
00065
00066 while ((c = getopt (argc, argv, "i:a:t:")) != -1){
00067 switch(c){
00068 case 'a': arch_filename=optarg;
00069 break;
00070 case 'i': ddg_filename =optarg;
00071 break;
00072 case 't': regtypename=optarg;
00073 break;
00074 case '?':
00075 cout<<"usage:"<< argv[0] <<" -i ddg_filename.xml [-a isa_desc.xml] [-t register_type_name] "<<endl;
00076 return EXIT_FAILURE;
00077 }
00078
00079 }
00080 if (arch_filename!=NULL) {
00081 isa_arch.read_from_xml(arch_filename);
00082 if(isa_arch.check()){
00083 dag=DAG(isa_arch);
00084 } else return EXIT_FAILURE;
00085
00086 }
00087
00088 if (ddg_filename != NULL){
00089 list<edge> le;
00090 edge e;
00091 i=dag.read_from_xml(ddg_filename);
00092 if(i==-1) return EXIT_FAILURE;
00093 if(! Is_Acyclic(dag,le)==true) {
00094 cerr<<"Input Error: Non Acyclic graph. Illegal arcs:\n";
00095 forall(e, le){
00096 cerr<<dag.id(dag.source(e))<<" -> "<< dag.id(dag.target(e))<<endl;
00097 }
00098 return EXIT_FAILURE;
00099 }
00100
00101 }
00102 else{
00103 cout<<"usage:"<< argv[0] <<" -i ddg_filename.xml [-a isa_desc.xml][-t register_type_name] "<<endl;
00104 return EXIT_FAILURE;
00105 }
00106
00107 if (regtypename!=NULL){
00108
00109 if(!isa_arch.exist_register_typename(regtypename)){
00110 cerr<<"Register type of name "<<regtypename<<" does not exist in the ISA.\n";
00111 return EXIT_FAILURE;
00112 }
00113 t=isa_arch.get_register_type_id( regtypename );
00114 cout<<"Register Saturation of type "<< regtypename<<" of the DAG (loop body) of "<<ddg_filename<<" is : "
00115 <<REGISTER_SATURATION (dag, t, nl, killer)<<endl;
00116 cout<<"Saturating values of type "<< regtypename <<endl;
00117 forall(n, nl){
00118 it= dag.instruction_type(n);
00119 cout<< dag.id(n)<< " with opcode " << it.opcode()<<endl;
00120 }
00121 cout<<"Saturating killing function of type "<< regtypename <<endl;
00122 VR=dag.get_V_R(t);
00123 forall(n, VR){
00124 if(killer[n]!=NULL) cout<<"k("<<dag.id(n)<<")="<<dag.id(killer[n])<<endl;
00125 else cout<<"k("<<dag.id(n)<<")= bottom"<<endl;
00126 }
00127 return EXIT_SUCCESS;
00128 }
00129
00130 T=dag.T();
00131
00132
00133 forall(rt, T) {
00134 t=rt.get_register_type_id();
00135 cout<<"Register Saturation of type "<< rt.get_register_typename()<<" of the DAG (loop body) of "<<ddg_filename<<" is : "
00136 <<REGISTER_SATURATION (dag, t, nl, killer)<<endl;
00137 cout<<"Saturating values of type "<< rt.get_register_typename() <<endl;
00138 forall(n, nl){
00139 it= dag.instruction_type(n);
00140 cout<< dag.id(n)<< " with opcode " << it.opcode()<<endl;
00141 }
00142 cout<<"Saturating killing function of type "<< rt.get_register_typename() <<endl;
00143 VR=dag.get_V_R(t);
00144 forall(n, VR){
00145 if(killer[n]!=NULL) cout<<"k("<<dag.id(n)<<")="<<dag.id(killer[n])<<endl;
00146 else cout<<"k("<<dag.id(n)<<")= bottom"<<endl;
00147 }
00148 }
00149 return EXIT_SUCCESS;
00150 }