Robert de Simone

Research interests

• Concurrency Theory and Models of Computation and Communication
• Semantics and implementation of Synchronous Reactive languages
• Formal Model-Based Design and Application/Architecture Adaptation
• Multiform Logical Time constraints in requirement engineering and specification of Cyber-Physical Systems
• Algorithmic model-checking techniques and schedule synthesis

Some Publications: on DBLP, on Google Scholar, Kairos team publications on HAL-Inria (see also previous Aoste team publications).

Some (older) Publications

• On Meije and SCCS, Infinite sums vs. Non-guarded definitions, R. de Simone, TCS 30 (1984).
• Higher-level Synchronising devices in Meije-SCCS, R.de Simone, TCS 37 (1985).
• Petri Nets and Algebraic Calculi of Processes, G.Boudol R.de Simone G.Roucairol, STACS 1986.
• Process Calculi, from Theory to Practice: Verification Tools, G.Boudol R.de Simone V.Roy D.Vergamini, Automatic Verification Methods for Finite State Systems, LNCS 407 (1989). [pdf]
• Aboard Auto, D. Vergamini, R. de Simone, INRIA RT-0111.pdf
  
• An Autograph Primer, V. Roy, R. de Simone, INRIA RT-0112.pdf
• The Esterel Language, F.Boussinot R.de Simone, Proceedings of the I.E.E.E., Sept. 91. [pdf]
• Causal Models for Rational Parallel Processes, A.Bouali R.de Simone, Concur'91, LNCS 527. [pdf]
• Symbolic Bisimulation Minimisation, A.Bouali R.de Simone, CAV'92, LNCS 663. [pdf]
• Compositional Semantics of Esterel and Verification by Compositional Reductions, R.de Simone A.Ressouche, CAV'94, LNCS 818.
• Using Partial-Order Methods for the Verification of Behavioural Equivalences, R.de Simone M.Lara de Souza, FORTE'95. [pdf]
• Verifying Synchronous Reactive Systems programmed in ESTEREL, A. Bouali  J.-P. Marmorat R. de Simone  H. Toma, FTRTFT'96 [pdf]
• Fc2Tools: a toolset for verification of concurrent systems, A. Bouali  A.Ressouche V.Roy  R. de Simone, TACAS'96 [.ps.gz]   [pdf]
• The SL Synchronous Language, F. Boussinot R. de Simone, IEEE Transactions on Software Engineering (1996), [pdf]
• Partial-order automata and behavioural equivalences, R.de Simone M.Lara de Souza, European Journal of Automation, 1997 [pdf]
• A Symbolic representation of asynchronous Networks of Synchronous Processes, A. Bouali R. de Simone, iwsl'98, 10th International Workshop on Logic Synthesis, 1998 [pdf]
• Using Esterel and Formal Methods to Increase the Confidence in the Functional Validation of a Commercial DSP, L. Arditi  A. Bouali H. Boufaied G. Clavé M. Hadj-Chaib,R. de Simone, FMICS'99 [pdf]
• Esterel: a Formal Method Applied to Avionic Software Development, G. Berry, A. Bouali, R. de Simone, X. Fornari, E. Ledinot, E. Nassor, Science of Computer Programming (2000)
• Synchronous Programming : Properties within a Reaction, Ch. André, R. de Simone, JESA (2002)
• Synchronous Languages Twelve Years Later, A. Benveniste, P. Caspi, S. Edwards, N. Halbwachs, P. L. Guernic, R. de Simone, Proceedings of the IEEE (2003)
• Optimizations for Faster Execution of Esterel Programs, D. Potop, R. de Simone, MEMOCODE'03 [pdf]
• Instantaneous Termination in Pure Esterel, R. de Simone, O. Tardieu, SAS'03 [pdf]
• Loops in Esterel, R. de Simone, O. Tardieu, ACM TECS (2004) [pdf]
• Curing Schizophrenia by Program Rewriting in Esterel, R. de Simone, O. Tardieu, MEMOCODE'04 [pdf]
• Syntax-Driven Reachable State Space Construction of Synchronous Reactive Programs, E. Vecchié and R. de Simone, International Journal of Embedded Systems (2005) [pdf]
• Syntax-driven optimizations for Reachable State Space construction of Esterel programs, E. Vecchié and R. de Simone, CAV'05 [pdf]
• An innovative MDA methodology for embedded real-time systems, A. Cuccuru R. de Simone, T. Saunier , G. Siegel, Y. Sorel, DSD'05 [pdf]
• Another glance at relay stations in latency-insensitive design, J. Boucaron, J-V. Millo, R. de Simone, FMGALS'2005 [pdf]
•  Guidelines for a graduate curriculum on embedded software and systems, collective work. ACM Trans. Embedded Comput. Syst. 4(3) (2005) [pdf]
• The Synchronous Hypothesis and Synchronous Languages, R. de Simone, D. Potop, and J-P. Talpin, Embedded Systems Handbook, CRC Press, 2006. [pdf]
• Towards a “Synchronous Reactive” UML profile ? R. de Simone and C. André,  International Journal on Software Tools for Technology Transfer (STTT), 8(2), 2006.[pdf]
• Latency-Insensitive Design and the Central Repetitive Problem, J. Boucaron, J-V. Millo, R. de Simone, In Proc. MEMOCODE’04, 4th IEEE/ACM intern. conf. on Methods and Models for co-design, 2006 [pdf]
• Formal Methods of Scheduling for Latency-Insensitive Designs. J. Boucaron, J-V. Millo, R. de Simone, EURASIP journal on Embedded Systems, Indawhi Publisher, 2007. [pdf]
• Time Modeling in MARTE, Ch. André, F. Mallet, and R. de Simone, In FDL’07, 10th ECSI Forum on Specification & Design Languages, 2007. [pdf]
• Modeling of Immediate vs. Delayed Data Communications : from AADL to UML MARTE,  Ch. André, F. Mallet, and R. de Simone, In FDL’07, 10th ECSI Forum on Specification & Design Languages, 2007. [pdf]
• Modeling Time(s). Ch. André, F. Mallet, and R. de Simone, In MoDELS’07, 10th ACM/IEEE Int. Conf. on Model Driven Engineering Languages and Systems. LNCS 4735, 2007.[pdf]    [pdf]
  
•  Necessary and Sufficient Conditions for Deterministic Desynchronization. D. Potop-Butucaru, Y. Sorel, and R. de Simone, In EMSOFT’07, Proceedings of 7th intern. ACM Conference on Embedded Systems Software, 2007.[pdf]
• Statically Scheduled Process networks, J. Boucaron, B. Ferrero, J-V. Millo, R. de Simone, INRIA Research Report [pdf]