% This file was created with JabRef 2.10. % Encoding: UTF-8 @InProceedings{DAC2019, Title = {Sample-Guided Automated Synthesis for {CCSL} Specifications}, Author = {Ming Hu and Tongquan Wei and Min Zhang and Fr{\'{e}}d{\'{e}}ric Mallet and Mingsong Chen}, Booktitle = {Proceedings of the 56th Annual Design Automation Conference 2019, {DAC} 2019}, Year = {2019}, Month = {June}, Pages = {98}, Publisher = {{ACM}}, Doi = {10.1145/3316781.3317904}, ISBN = {978-1-4503-6725-7}, Location = {Las Vegas, NV, USA}, Timestamp = {Wed, 16 Oct 2019 14:14:54 +0200} } @Article{KhanMR19, Title = {A framework to specify system requirements using natural interpretation of {UML/MARTE} diagrams}, Author = {Aamir M. Khan and Fr{\'{e}}d{\'{e}}ric Mallet and Muhammad Rashid}, Journal = {Software and System Modeling}, Year = {2019}, Number = {1}, Pages = {11--37}, Volume = {18}, Doi = {10.1007/s10270-017-0588-7}, Url = {https://doi.org/10.1007/s10270-017-0588-7} } @Article{Yue2019, Title = {TRAP: trace runtime analysis of properties}, Author = {Yue, Daian and Joloboff, Vania and Mallet, Fr{\'e}d{\'e}ric}, Journal = {Frontiers of Computer Science}, Year = {2019}, Month = {Dec.}, Number = {3}, Pages = {143201}, Volume = {14}, Abstract = {We present a method and a tool for the verification of causal and temporal properties for embedded systems. We analyze trace streams resulting from the execution of virtual prototypes that combine simulated hardware and embedded software. The main originality lies in the use of logical clocks to abstract away irrelevant information from the trace. We propose a model-based approach that relies on domain specific languages (DSL). A first DSL, called TISL (trace item specification language), captures the relevant data structures. A second DSL, called STML (simulation trace mapping language), abstracts the simulation raw data into logical clocks, abstracting simulation data into relevant observation probes and thus reducing the trace streams size. The third DSL, called TPSL, defines a set of behavioral patterns that include widely used temporal properties. This is meant for users who are not familiar with temporal logics. Each pattern is transformed into an automata. All the automata are executed concurrently and each one raises an error if and when the related TPSL property is violated. The contribution is the integration of this pattern-based property specification language into the SimSoC virtual prototyping framework without requiring to recompile all the simulation models when the properties evolve. We illustrate our approach with experiments that show the possibility to use multi-core platforms to parallelize the simulation and verification processes, thus reducing the verification time.}, Day = {07}, Doi = {10.1007/s11704-018-7217-7}, ISSN = {2095-2236}, Owner = {fmallet}, Timestamp = {2019.12.11}, Url = {https://doi.org/10.1007/s11704-018-7217-7} } @InProceedings{FASE2019, Title = {SMT-Based Bounded Schedulability Analysis of the Clock Constraint Specification Language}, Author = {Min Zhang and Fu Song and Fr{\'{e}}d{\'{e}}ric Mallet and Xiaohong Chen}, Booktitle = {Fundamental Approaches to Software Engineering, {FASE} 2019}, Year = {2019}, Month = {04}, Pages = {61--78}, Publisher = {Springer}, Series = {Lecture Notes in Computer Science}, Volume = {11424}, Doi = {10.1007/978-3-030-16722-6\_4}, Location = {Prague, Czech Republic}, Timestamp = {Thu, 04 Apr 2019 12:18:13 +0200}, Url = {https://doi.org/10.1007/978-3-030-16722-6\_4} } @Article{Zhang2019a, Title = {A verification framework for spatio-temporal consistency language with {CCSL} as a specification language}, Author = {Zhang, Yuanrui and Mallet, Fr{\'e}d{\'e}ric and Chen, Yixiang}, Journal = {Frontiers of Computer Science}, Year = {2019}, Month = {Nov.}, Number = {1}, Pages = {105--129}, Volume = {14}, Day = {13}, Doi = {10.1007/s11704-018-7054-8}, ISSN = {2095-2236}, Url = {https://doi.org/10.1007/s11704-018-7054-8} } @InProceedings{TASE2019, Title = {A Logical Approach for the Schedulability Analysis of {CCSL}}, Author = {Yuanrui Zhang and Fr{\'{e}}d{\'{e}}ric Mallet and Huibiao Zhu and Yixiang Chen}, Booktitle = {International Symposium on Theoretical Aspects of Software Engineering, {TASE} 2019}, Year = {2019}, Editor = {Dominique M{\'{e}}ry and Shengchao Qin}, Month = {July}, Pages = {25--32}, Publisher = {{IEEE}}, Doi = {10.1109/TASE.2019.00-23}, ISBN = {978-1-7281-3342-3}, Location = {Guilin, China}, Timestamp = {Mon, 09 Dec 2019 18:38:09 +0100} } @InProceedings{Zhao2019, Title = {Meta-models Combination for Reusing Verification Techniques}, Author = {Hui Zhao and Ludovic Apvrille and Fr{\'e}d{\'e}ric Mallet}, Booktitle = {International Conference on Model-Driven Engineering and Software Development}, Year = {2019}, Address = {Prague, Czech Republic}, Month = {March}, Pages = {37--48} } @InProceedings{Zhao2019a, Title = {A Language-based Multi-view Approach for Combining Functional and Security Models}, Author = {Zhao, Hui and Mallet, Fr\'ed\'eric and Apvrille, Ludovic}, Booktitle = {26th Asia-Pacific Software Engineering Conference, APSEC 2019}, Year = {2019}, Month = {Dec.} } @comment{jabref-meta: databaseType:bibtex;}