References

1

O. Coudert, J.-C. Madre, and H. Touati. TiGeR Version 1.0 User Guide, Digital Paris Research Lab, December 1993.

2

E. Sentovich, H. Toma, and G. Berry. Latch Optimization in Circuits Generated from High-level Descriptions. In Proc of ICCAD, November 1996.

3

E. Sentovich, H. Toma, and G. Berry. Efficient Latch Optimization Using Incompatible Sets. In Proceedings of the Design Automation Conference, June 1997.

4

E.M. Sentovich, K.J. Singh, L. Lavagno, C. Moon, R. Murgai, A. Saldanha, H. Savoj, P.R. Stephan, R.K. Brayton, and A.L. Sangiovanni-Vincentelli. SIS: A System for Sequential Circuit Synthesis. Technical Report Memorandum No. UCB/ERL M92/41, University of California Berkeley, 1992.